In applications with segmented high purity Ge detectors or other detectorarrays with tens or hundreds of channels, where the high development cost andlimited flexibility of application specific integrated circuits outweigh theirbenefits of low power and small size, the readout electronics typically consistof multi-channel data acquisition modules in a common chassis for power, clockand trigger distribution, and data readout. As arrays become larger and reachseveral hundred channels, the readout electronics have to be divided overseveral chassis, but still must maintain precise synchronization of clocks andtrigger signals across all channels. This division becomes necessary not onlybecause of limits given by the instrumentation standards on module size andchassis slot numbers, but also because data readout times increase when moremodules share the same data bus and because power requirements approach thelimits of readily available power supplies. In this paper, we present a methodfor distributing clocks and triggers between 4 PXI chassis containing DGFPixie-16 modules with up to 226 acquisition channels per chassis in a dataacquisition system intended to instrument the over 600 channels of the SeGAdetector array at the National Superconducting Cyclotron Laboratory. Oursolution is designed to achieve synchronous acquisition of detector waveformsfrom all channels with a jitter of less then 1 ns, and can be extended to alarger number of chassis if desired.
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